Synopsys Creates Cloud SaaS Solution to Transform Chip Development

To dramatically increase the productivity and efficiency of increasingly complex chip designs, Synopsys introduces a new cloud-optimized Electronic Design Automation (EDA) deployment model.

Synopsys Cloud provides access to the company’s cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to meet higher levels of interdependencies in chip development.

Developing chips in the cloud represents a way forward for an industry struggling with explosive computing demands and continued pressure on time to market.

In recent years, chip development teams have begun to take advantage of a “bring your own cloud” (BYOC) approach offered by Synopsys and other EDA vendors, where chip development teams must source compute infrastructure from public cloud service providers and are often constrained by pre-defined design and verification capability.

Synopsys is working closely with its preferred cloud partner, Microsoft, to transform the landscape with a software-as-a-service (SaaS) chip development solution on the Microsoft Azure cloud computing platform. With the SaaS approach, customers can directly access and pay as they go for cloud compute resources and any cloud-enabled Synopsys design and verification product.

Customers who already have cloud resources through a BYOC model can also take advantage of Synopsys Cloud and its pay-as-you-go cloud EDA tools.

Working with Microsoft Azure will allow design teams to benefit from faster flexibility and time to market, addressing today’s systemic complexities of chip design and verification. Learn more about Microsoft about this collaboration and its benefits.

Synopsys is working with leading foundries to streamline access to required manufacturing warranties for use with its cloud-optimized products. The collaboration roadmap aims to provide customers with a flexible, cloud-optimized approach to accessing and managing foundry media.

“Our new Synopsys Cloud offering promises to be transformative, giving designers the ability to scale up or down in response to their dynamic chip design and verification needs,” said Sassine Ghazi, President and Chief Operating Officer at Synopsys. “As more and more design flows incorporate AI, requiring even more resources, the virtually unlimited access to compute and EDA we provide will lay the foundation for new levels of innovation in semi -drivers while providing a flexible and secure chip development environment for future demands.”

For more information on this news, visit www.synopsys.com.

Maria H. Underwood